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?2013 fairchild semiconductor corporation fod8332 rev. 1.0 www.fairchildsemi.com may 2017 fod8334 input led drive, 4.0 a peak output current, igbt drive optocoupler with desaturation detection, isolated fault sensing, and active miller clamp fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp features ? ? ? ? C cm = 1500 v peak ? C C ? C C soft igbt turn C ? C C ? C C ? C rms for 1 minute C peak working insulation voltage rating 8,000 v peak transient isolation voltage rating 8 mm creepage and clearance distance applications ? ? ? ? ? description the fod8334 is an advanced 4.0 a peak output current igbt drive optocoupler capable of driving medium - power igbts with ratings up to 1,200 v and 150 a. it is suited for fast - switching driving of power igbts and mosfets in motor - control inverter applications and high - performance power systems. the fod8334 offers protection features necess ary for preventing fault condi tions that lead to destructive thermal runaway of igbts. the device utilizes fairchilds prop related resources ? fod8316 2.5 a output current, igbt drive optocoupler with desaturation, isolated fault sensing ? fod8318 2.5 a output current, igbt drive optocoupler with active miller clamp, desaturation detection, and isolated fault sensing ? fod8333 C input led drive, 2.5 a output current, igbt drive optocoupler with desaturation detection, isolated fault sensing, a ctive miller clamp, and automatic fault reset ? fod8332 C input led drive, 2.5 a output current, igbt drive optocoupler with desaturation detection, isolated fault sensing, active miller clamp ? an - 3009 standard gate - driver optocouplers ? www.fairchildsemi.com/search/tree/optoelectronics
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 2 truth table led uvlo (v dd C v e ) desat detected? fault (1) v o x active x high low on not active yes low low off x x high low on not active no high high note: 1. fault pin is connected to a pull - up resist o r. pin definitions pin # name description 1 gnd ground for fault - sense optocoupler 2 v cc positive supply voltage (3 v to 15 v) for fault sense optocoupler 3 fault fault - sense output 4 gnd ground for fault - sense optocoupler 5 v led1 - led1 cathode 6 v led1+ led1 anode 7 v led1+ led1 anode 8 v led1 - led1 cathode 9 v ss negative output supply voltage 10 v clamp clamp supply voltage 11 v o gate - drive output voltage 12 v ss negative output supply voltage 13 v dd positive output supply voltage 14 desat desaturation voltage input 15 v led2+ led2 anode (do not connect. leave floating.) 16 v e output supply voltage/igbt emitter fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 1 . pin configuration
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 3 block diagram fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 2 . functional block diagram
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 4 safety and insulation ratings as per din en/iec 60747 - 5 - 5, this optocoupler is suitable for safe electrical insulation only within the safety limit data. compliance with the safety ratings must be ensured by means of protective circuits. parameter charact erist ic s installation classifications per din vde 0110/1.89 table 1 rated mains voltage < 150 v rms i C iv < 300 v rms i C rms i C rms i C rms i C 40/100/21 pollution degree (din vde 0110/1.89) 2 symbol parameter min. typ. max. unit cti comparative tracking index (din iec 112/vde 0303 part 1) 175 v pr input - to - output test voltage, method b, v iorm x 1.875 = v pr , 100% production test with t m = 1 s, partial discharge < 5 pc 2651 v peak input - to - output test voltage, method a, v iorm x 1.6 = v pr , type and sample test with t m = 10 s, partial discharge < 5 pc 2262 v peak v iorm maximum working insulation voltage 1414 v peak v iotm highest allowable over voltage 8000 v peak external creepage 8.0 mm external clearance 8.0 mm insulation thickness 0.5 mm t case safety limit values C maximum values in failure; case temperature 150 c p s,input safety limit values C maximum values in failure; input power 100 mw p s,output safety limit values C maximum values in failure; output power 600 mw r io insulation resistance at ts, vio = 500 v 10 9 ? fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 5 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. t a = 25oc unless otherwise specified. symbol parameter value units t stg storage temperature - 40 to +125 oc t opr operating temperature - 40 to +100 oc t j junction temperature - 40 to +125 oc t sol lead solder temperature (not certified for wave immersion) refer to reflow temperature profile on page 31 260 for 10 s oc pd i input power dissipation (2)(3) 45 mw pd o output power dissipation (3)(4) 600 mw gate drive channel i f(avg) average input current 25 ma i f(peak) peak transient forward current (pulse width < 1 s) 1.0 a i oh(peak) peak output high current (5) 4 .0 a i ol(peak) peak output low current (5) 4 .0 a v r reverse input voltage 5.0 v v e C v ss negative output supply voltage (6) - 0.5 to 15 v v dd C ve positive output supply voltage - 0.5 to 35 C (v e C v ss ) v v o(peak) C v ss gate drive output voltage - 0.5 to 35 v v dd C v ss output supply voltage - 0.5 to 35 v v desat desaturation voltage v e to v e + 25 v i desat desaturation current 60 ma v clamp C v ss active miller clamping voltage - 0.5 to 35 v i clamp peaking clamping sinking current 1.7 a t r(in) , t f(in) input signal rise and fall time 500 ns fault sense channel v cc positive input supply voltage - 0.5 to 20 v v fault fault output voltage - 0.5 to 20 v i fault fault output current 16.0 ma notes: 2. no derating required across temperature range. 3. functional operation under these conditions is not implied. permanent damage may occur if the device is subjected to conditions outside these ratings. 4. derate linearly above 25c, free air temperature at a rate of 6.2 mw/c. 5. maximum pulse width = 10 s. 6. this negative output supply voltage is optional. it is only needed when negative gate drive is implemented. fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 6 recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a ambient operating temperature - 40 +100 oc i f(on) input current (on) 7 16 ma v f(off) input voltage (off) - 3.6 0.8 v v cc supply voltage 3 15 v v dd C v ss total output supply voltage 15 30 v v dd C v e positive output supply voltage (7) 15 30 C (v e C v ss ) v v e C v ss negative output supply voltage 0 15 v t pw input pulse width 500 ns note: 7. during power up or down, ensure that both the input and output supply voltages reach the proper recommended operating voltages to avoid any momentary instability at the output state. isolation characteristics apply over all recommended conditions; typical value is measured at t a = 25oc. symbol parameter conditions min. typ. max. units v iso input - output isolation voltage t a = 25c, relative humidity < 50%, t = 1.0 minute, i i - o ? 10 a, 50 hz (8)(9)(10) 4,243 v rms r iso isolation resistance v i - o = 500 v (8) 10 11 c iso isolation capacitance v i - o = 0 v, frequency = 1.0 mhz (8) 1 pf notes: 8. device is considered a two - terminal device: pins 1 to 8 are shorted together and pins 9 to 16 are shorted together. 9. 4,243 v rms for 1 - minute duration is equivalent to 5,091 v rms for 1 - second duration. 10. the input - output isolation voltage is a dielectric voltage rating per ul1577. it should not be regarded as an input - output continuous voltage rating. for the continuous working voltage rating, refer to equipment - level safety specification or din en/iec 60747 - 5 - 5 safety and insulation ratings table on page 4. fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 7 electrical characteristics apply over all recommended conditions; typical value is measured at v cc = 5 v, v dd C v ss = 30 v, v e C v ss = 0 v, and t a = 25c; unless otherwise specified. symbol parameter conditions min. typ. max. units figure gate drive channel v f input forward voltage i f = 10 ma 1.10 1.45 1.80 v 5 ? (v f /t a ) temperature coefficient of forward voltage - 1.5 mv/oc bv r input reverse breakdown voltage i r = 10 a 5 v c in input capacitance f = 1 mhz, v f = 0 v 60 pf i flh threshold input current, low - to - high i o = 0 ma, v o > 5 v 2.5 7.0 ma 30 v fhl threshold input voltage, high - to - low i o = 0 ma, v o < 5 v 0.8 v 31 i oh high level output current v o = v dd C 10 v, i f = 1 0ma (11) - 3.0 - 4.0 a 6, 10, 32 i ol low level output current v o = v ss + 10 v, i f = 0 ma (11) 3.0 4.0 a 7, 11, 33 r ds,o h high level output r ds (on) i oh = - 3 a (11) 0.5 1.3 3.5 ? 10 r ds,ol low level output r ds (on) i o l = 3 a (11) 0.5 1.0 3. 0 ? 11 i olf low level output current during fault condition v o C v ss = 14 v 70 125 170 ma 34 v oh high level output voltage i f = 10 ma, i o = C 100 ma (12)(13)(14 ) v dd C 1.0 v dd C 0.2 v 8, 10, 35 v ol low level output voltage i f = 0 ma, i o = 100 ma 0.1 0.5 v 9, 11, 36 i ddh high level supply current v o = open (14 ) , i o = 0 ma 2.5 5.0 ma 12, 13, 37 i ddl low level supply current v o = open, i o = 0 ma 2.5 5.0 ma 12, 13, 38 i el v e low level supply current - 0.8 - 0.5 ma 38 i eh v e high level supply current - 0.50 - 0.25 ma 37 i chg blanking capacitor charge current v desat = 2 v (14)(15 ) - 0.33 - 0.25 - 0.13 ma 14, 39 i dschg blanking capacitor discharge current v desat = 7 v 10 40 ma 39 v uvlo+ under - voltage lockout threshold (1 3 ) i f = 10 ma, v o > 5 v 10.8 11.7 12.7 v 40 v uvlo - i f = 10 ma, v o < 5 v 9.8 10.7 11.7 v uvlo hys under - voltage lockout threshold hysteresis 1.0 v v desat desat threshold (13 ) v dd C v e > v ulvo C 6.0 6.5 7.2 v 15, 39 v clamp_thres clamping threshold voltage 2.0 v 41 i clampl clamp low level sinking current v o = v ss + 2.5 v 0.35 1.10 a 16, 42 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 8 electrical characteristics (continued) apply over all recommended conditions; typical value is measured at v cc = 5 v, v dd C v ss = 30 v, v e C v ss = 0 v, and t a = 25c; unless otherwise specified. symbol parameter conditions min. typ. max. units figure fault feedback channel i cch fault high level supply current i f2 = 0 ma, v fault = open, v cc = 15 v 0.0004 2 a 43 i ccl fault low level supply current i f2 = 16 ma, v fault = open, v cc = 15 v 150 200 a 44 i faulth fault logic high output current v fault = v cc = 5.5 v 0.02 0.50 a 45 i faultl fault logic low output current v fault = 0.4 v, v cc = 5.5 v 1.1 ma 17, 46 notes: 11. maximum pulse width = 10 s 12. v oh is measured with the dc load current in this testing (maximum pulse width = 1 ms, maximum duty cycle = 20%). when driving capacitive loads, v oh approaches v dd as i oh approaches zero units. 13. positive output supply voltage (v dd C v e ) should be at least 15 v to ensure adequate margin in excess of the maximum under - voltag e lockout threshold, v uvlo+ , of 12.7 v. 14. when v dd C v e > v uvlo and the output state v o is allowed to go high, the desat - detection feature is active and provides the primary source of igbt protection. uvlo is needed to ensure desat detection is functional. 15. the blanking time, t blank , is adjustable by an external capacitor (c blank ), where t blank = c blank ? (v desat / i chg ). fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 9 switching characteristics apply over all recommended conditions; typical value is measured at v cc = 5 v, v dd C v ss = 30 v, v e C v ss = 0 v, and t a = 25c; unless otherwise specified. symbol parameter conditions min. typ . max . units figure t phl propagation delay to logic low output (17 ) rg = 10 ? , cg =10 nf, f = 10 khz, duty cycle = 50%, i f = 10 ma, v dd C v ss = 30 v (16 ) 100 135 250 ns 18, 19, 20, 21, 47 t plh propagation delay to logic high output (18 ) 100 150 250 ns pwd pulse width distortion, | t phl C t plh | (19 ) 15 100 ns 47 pdd skew propagation delay difference between any two parts or channels, ( t phl C t plh ) (20 ) - 150 150 ns t r output rise time (10% to 90%) 50 ns 47 t f output fall time (90% to 10%) 50 ns t desat(low) desat sense to desat low propagation delay (23) rg = 10 ? , cg = 10 nf, v dd C v ss = 30 v (c desat = 100pf, r f = 4.7 k ? , v cc = 5.5 v) 0.25 s t desat(90%) desat sense to 90% v o delay (21) 0.45 0.70 s 22, 48 t desat(10%) desat sense to 10% v o delay (21) 2.8 4.0 s 23, 24,25, 48 t desat(fault) desat sense to low level fault signal delay (22) 0.5 1.5 s 26, 48 t reset( fault ) reset to high level fault signal delay (24) 0.5 2.3 4.5 s 27, 48 t desat(mute) desat input mute 10.0 22.0 35.0 s 48 t uvlo on uvlo turn - on delay (25 ) v dd = 20 v in 1.0 ms ramp 4.0 s 49 t uvlo off uvlo turn - off delay (26 ) 4.0 s t gp time - to - good power (27 ) v dd = 0 to 30 v in 10 s ramp 2.0 s 28, 29, 49 | cm h | common mode transient immunity at output high t a = 25?c, v cc = 5 v, v dd = 25 v, v ss = ground, c f = 15 pf, r f = 4.7 k ? ? v cm = 1500 v peak (28 ) 35 50 kv/s 51, 52 | cm l | common mode transient immunity at output low t a = 25?c, v cc = 5 v, v dd = 25 v, v ss = ground, c f = 15 pf, r f = 4.7 k ? , v cm = 1500 v peak (29 ) 35 50 kv/s 50, 53 notes: 16. this load condition approximates the gate load of a 1200 v / 150 a igbt. 17. propagation delay t phl is measured from the 50% level on the falling edge of the input pulse to the 50% level of the falling edge of the v o signal. 18. propagation delay t plh is measured from the 50% level on the rising edge of the input pulse to the 50% level of the rising edge of the v o signal. 19. pwd is defined as | t phl C t plh | for any given device. 20. the difference between t phl and t plh between any two parts under same operating conditions with equal loads. 21. the length of time the desat threshold must be exceeded before v o begins to go low. this is supply voltage dependent. fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 10 22. the time from desat threshold is exceeded until the fault output goes low. 23. the length of time the desat threshold must be exceeded before v o begins to go low and the fault output begins to go low. 24. the length of time from when reset is initiated (via i f turn - on) until fault output goes high. 25. the uvlo turn - on delay, t uvlo on , is measured from the v uvlo+ threshold level of th e rising edge of the output supply voltage (v dd ) to the 5 v level of the rising edge of the v o signal. 26. the uvlo turn - off delay, t uvlo off , is measured from the v uvlo C threshold level of the falling edge of the output supply voltage (v dd ) to the 5 v level o f the falling edge of the v o signal. 27. the time to good power, t gp , is measured from the v uvlo+ threshold level of the rising edge of the output supply voltage (v dd ) to the 5 v level of the rising edge of the v o signal. 28. common - mode transient immunity at output high state is the maximum tolerable negative dvcm/ dt on the trailing edge of the common - mode pulse, v cm , to assure the output remains in high state (i.e., v o > 15 v or v fault > 2 v). 29. common - mode transient immunity at output low state is the maximum positive tolerable dvcm/ dt on the leading edge of the common - mode pulse, v cm , to ensure the output remains in low state (i.e., v o < 1.0 v or v fault < 0.8 v). fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 11 timing diagrams i f t r t f 90% 50% v o 10% t plh t phl figure 3. t plh , t phl , t r , and t f timing diagram i f t desat(low) v desat 6.5v t blank 50% t desat(10%) 90% reset initiated upon the next i f turn - on. v o t desat(90%) 10% t reset(fault) fault t desat(fault) 50% t desat(mute) 50% figure 4. definitions for desat, v o and fault timing waveforms fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 12 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 5. input forward current (i f ) vs. voltage (v f ) figure 6. high level output current (i oh ) vs. temperature figure 7. low level output current (i ol ) vs. temperature figure 8. high level output voltage drop (v oh - v dd ) vs. temperature figure 9. low level output voltage (v ol ) vs. temperature figure 10. high level output voltage (v oh ) vs. high level output current (i oh ) typical performance characteristics -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 6 7 8 v dd - v ss = 30 v i led1+ = 10 ma v oh = v dd - 10 v i oh - high level output current (a) t a - temperature (c) 0.8 1.0 1.2 1.4 1.6 1.8 0.01 0.1 1 10 100 -40c 25c 100c i f - input forward current (ma) v f - input forward voltage (v) -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 6 7 8 v dd - v ss = 30 v i led1+ = 0 a v ol = v ss + 10 v i ol - low level output current (a) t a - temperature (c) -40 -20 0 20 40 60 80 100 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 i led1+ = 10 ma v dd - v ss = 30 v i oh = -100 ma v oh - v dd - high level output voltage drop (v) t a - temperature (c) -40 -20 0 20 40 60 80 100 0.00 0.05 0.10 0.15 0.20 i led1+ = 0 a v dd - v ss = 30 v i ol = 100 ma v ol - low level output voltage (v) t a - temperature (c) 0 1 2 3 4 5 6 7 20 22 24 26 28 30 25c -40c t a = 100c v dd - v ss = 30 v i led1+ = 10 ma v oh - high level output voltage (v) i oh - high level output current (a)
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 13 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 11. low level output voltage (v ol ) vs. low level output current (i ol ) figure 12. output supply current (i dd ) vs. temperature figure 13. output supply current (i dd ) vs. voltage (v dd ) figure 14. blanking capacitor charge current (i chg ) vs. temperature figure 15. desat threshold (v desat ) vs. temperature figure 16. clamp low level sinking current (i clampl ) vs. temperature typical performance characteristics (continued) -40 -20 0 20 40 60 80 100 -0.30 -0.25 -0.20 -0.15 i led1+ = 10 ma v dd - v ss = 30 v v desat = 2 v i chg - blanking capacitor charge current (ma) t a - temperature (c) -40 -20 0 20 40 60 80 100 6.00 6.25 6.50 6.75 7.00 i led1+ = 10 ma v dd - v ss = 30 v v desat - desat threshold (v) t a - temperature (c) -40 -20 0 20 40 60 80 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 i led1+ = 0 a v dd - v ss = 30 v v clamp = v ss + 2.5 v i clampl - clamp low level sinking current (a) t a - temperature (c) 0 1 2 3 4 5 6 7 0 2 4 6 8 10 25c -40c t a = 100c v dd - v ss = 30 v i led1+ = 0 a v ol - low level output voltage (v) i ol - low level output current (a) -40 -20 0 20 40 60 80 100 2.0 2.2 2.4 2.6 2.8 3.0 i ddh i ddl i led1+ = 0 a (i ddl ) / 10 ma (i ddh ) v dd - v ss = 30 v v o = open i dd - output supply current (ma) t a - temperature (c) 15 20 25 30 1.5 2.0 2.5 3.0 i ddh i ddl i led1+ = 0 a (i ddl ) / 10 ma (i ddh ) v o = open i dd - output supply current (ma) v dd - output supply voltage (v)
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 14 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 18. propagation delay (t p ) vs. temperature figure 19. propagation delay (t p ) vs. supply voltage (v dd ) figure 20. propagation delay (t p ) vs . load resistance (r g ) figure 21. propagation delay (t p ) vs. load capacitance (c g ) figure 22. desat sense to 90% v o delay (t desat(90%) ) vs.temperature typical performance characteristics (continued) figure 17. fault logic low output current (i faultl ) vs. voltage (v faultl ) 0 1 2 3 4 5 0 2 4 6 8 10 -40 c 100 c 25 c v cc = 5.5 v i led2+ = 10 ma i faultl - fault logic low output current (ma) v faultl - fault logic low output voltage (v) -40 -20 0 20 40 60 80 100 0.0 0.2 0.4 0.6 0.8 1.0 v dd - v ss = 15 v v dd - v ss = 30 v v dd - v ss = 15 v / 30 v i led1+ = 10 ma r g = 10 ? c g = 10 nf t desat(90%) - desat sense to 90% v o delay (s) t a - temperature (c) 0 10 20 30 40 50 0 50 100 150 200 250 t phl t plh i led1+ = 10 ma f = 10 khz 50% duty cycle v dd - v ss = 30 v rg = 10 ? t p - propagation delay (ns) c g - load capacitance (nf) 15 20 25 30 0 50 100 150 200 250 t phl t plh i led1+ = 10 ma f = 10 khz 50% duty cycle rg = 10 ? cg = 10 nf t p - propagation delay (ns) v dd - output supply voltage (v) -40 -20 0 20 40 60 80 100 0 50 100 150 200 250 t phl t plh i led1+ = 10 ma f = 10 khz 50% duty cycle v dd - v ss = 30 v rg = 10 ? cg = 10 nf t p - propagation delay (ns) t a - temperature (c) 0 10 20 30 40 50 0 50 100 150 200 250 t phl t plh i led1+ = 10 ma f = 10 khz 50% duty cycle v dd - v ss = 30 v cg = 10 nf t p - propagation delay (ns) r g - load resistance ( ? )
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 15 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 23. desat sense to 10% v o delay (t desat(10%) ) vs. temperature figure 24. desat sense to 10% v o delay (t desat(10%) ) vs. load resistance (r g ) figure 25. desat sense to 10% v o delay (t desat(10%) ) vs. load capacitance (c g ) figure 28. time to good power (t gp ) vs. temperature figure 26. desat sense to low level fault signal delay (t desat( fault) ) vs. fault load resistance (r f ) figure 27. reset to high level fault signal delay (t reset(fault) ) vs. fault load resistance (r f ) typical performance characteristics (continued) -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 v dd - v ss = 30 v i led1+ = 10 ma t gp - time to good power (s) t a - temperature (c) 4 5 6 7 8 9 10 0 2 4 6 8 10 -40c 25c 100c 100c v cc = 5.5v v cc = 3.3v v dd - v ss = 30 v t reset(fault) - reset to high level fault signal delay (s) r f - fault load resistance ( k ? ) 25c -40c 4 5 6 7 8 9 10 0.25 0.30 0.35 0.40 0.45 0.50 0.55 -40c 25c 100c 100c v cc = 5.5v v cc = 3.3v v dd - v ss = 30 v t desat(fault) - desat sense to low level fault signal delay (s) r f - fault load resistance ( k ? ) 25c -40c 0 10 20 30 40 50 0 5 10 15 v dd - v ss = 15 v v dd - v ss = 30 v v dd - v ss = 15 v / 30 v i led1+ = 10 ma r g = 10 ? t desat(10%) - desat sense to 10% v o delay (s) c g - load capacitance ( nf ) 10 20 30 40 50 0 1 2 3 4 5 v dd - v ss = 15 v v dd - v ss = 30 v v dd - v ss = 15 v / 30 v i led1+ = 10 ma c g = 10 nf t desat(10%) - desat sense to 10% v o delay (s) r g - load resistance ( ? ) -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 v dd - v ss = 15 v v dd - v ss = 30 v v dd - v ss = 15 v / 30 v i led1+ = 10 ma r g = 10 ? c g = 10 nf t desat(10%) - desat sense to 10% v o delay (s) t a - temperature (c)
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 16 figure 29. time to good power (t gp ) vs. output supply voltage (v dd ) fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp typical performance characteristics (continued) 15 20 25 30 0 1 2 3 4 5 i led1+ = 10 ma t a = 25 c t gp - time to good power (s) v dd - output supply voltage (v)
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 17 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 30. threshold input current low - to - high (i flh ) test circuit figure 31. threshold input voltage high - to - low (v fhl ) test circuit figure 32. high level output current (i oh ) test circuit test circui ts v i n 1 0 m a + - + - 3 0 v v e 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s r m + - + - p w = 1 0 s i o h 1 f 4 7 f v o 1 f 4 7 f 0 v 2 v + - + - v o 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 0 a 1 0 m a + - + - v o 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 18 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 33. low level output current (i ol ) test circuit figure 34. low level output current during fault condition (i olf ) test circuit figure 35. high level output voltage (v oh ) test circuit test circuits (conti nued) v i n 0 a + - + - 3 0 v v e 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s r m + - p w = 1 0 s i o l v o 1 f 4 7 f 1 f 4 7 f + - + - + - 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s v i n 1 0 m a r m + - + - v c c 0 . 1 f 4 . 7 k v f a u l t 1 0 0 p f v o i o l f 1 0 1 0 n f 1 0 m a + - + - v o h 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 19 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 36. low level output voltage (v ol ) test circuit figure 37. high level supply current (i ddh ), v e high level supply current (i eh ) test circuit figure 38. low level supply current (i ddl ), v e low level supply current (i el ) test circuit test circuits (continued) + - + - v o l 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s 1 0 m a + - + - 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s i e h i d d h + - + - 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s i e l i d d l
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 20 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 39. desat threshold (v desat ), blanking capacitor charge current (i chg ), blanking capacitor discharge current (i dschg ) test circuit figure 40. under - voltage lockout threshold (v uvlo+ / v uvlo - ), under - voltage lockout threshold hysteresis (uvlo hys ) test circuit figure 41. clamping threshold voltage (v clamp_thres ) test circuit test circuits (continued) + - + - 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - v c c 0 . 1 f 4 . 7 k + - 1 0 m a 0 v 8 v i c h g i d s c h g v d e s a t 1 0 m a + - + - v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s v o 0 v 0 v 1 5 v + - + - v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 5 v 0 v 5 0 v t c l a m p 3 0 v 1 0 m a 0 a
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 21 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 42. clamp low sinking current (i clampl ) test circuit figure 43. fault high level supply current (i cch ) test circuit figure 44. fault low level supply current (i ccl ) test circuit test circuits (continued) + - + - v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 2 . 5 v i c l a m p l 3 0 v 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 1 5 v 0 . 1 f v f a u l t i c c h 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 1 5 v 0 . 1 f v f a u l t i c c l 0 . 1 f 1 6 m a
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 22 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 47. propagation delay (t plh , t phl ), rise time (t r ) , fall time (t f ), pulse width distortion (pwd)test circuit test circuits (continued) figure 45. fault high level output current (i faulth ) test circuit figure 46. fault low level output voltage (v faultl ) test circuit 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 5 . 5 v 0 . 1 f v f a u l t i f a u l t h + - 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 5 . 5 v 0 . 1 f v f a u l t l 0 . 1 f 1 0 m a 1 . 1 m a + - + - 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s v i n 1 0 m a 1 0 k h z d c = 5 0 % r m v o 1 0 1 0 n f
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 23 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 49. under - voltage lockout delay (t uvlo ), time to good power delay (t gp ) test circuit figure 50. common - mode low (cml) led1 - off test circuit test circuits (continued) figure 48. desat sense delay (t desat(90%) , t desat(10%) , t desat(low) ), desat sense to low level fault signal delay (t desat(fault) ), reset to high level fault signal delay (t reset(fault) ), desat input mute (t desat(mute) ) test circuit + - + - 3 0 v v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s v i n 1 0 m a r m + - + - v c c 0 . 1 f 4 . 7 k v f a u l t 1 0 0 p f v o 1 0 1 0 n f 1 0 m a + - v e 1 f 1 f 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s v o 2 0 v t u v l o t r = t f = 1 m s t g p t r = t f = 1 0 s 2 5 v 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s 3 6 0 + - 5 v 0 . 1 f 4 . 7 k s c o p e 1 0 1 0 n f 1 5 p f o r 1 n f + - v c m
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 24 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp figure 51. common - mode high (cmh) led1 - on test circuit figure 52. common - mode high (cmh) led2 - off test circuit figure 53. common - mode low (cml) led2 - on test circuit test circuits (continued) 2 5 v 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s 3 6 0 + - 5 v 0 . 1 f 4 . 7 k s c o p e 1 0 1 0 n f 1 5 p f o r 1 n f + - v c m 5 v 2 5 v 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s 3 6 0 + - 0 . 1 f 4 . 7 k 1 0 1 0 n f 1 5 p f o r 1 n f + - v c m s c o p e 2 5 v 1 f 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s 3 6 0 + - 0 . 1 f 4 . 7 k 1 0 1 0 n f 1 5 p f o r 1 n f + - v c m s c o p e 5 v
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 25 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp application information figure 54. recommended application circuit figure 55. detailed internal behavioral schematic th e functional behavior of fod8334 is illustrated by the detailed internal schematic shown in figure 55. figure 55 and the timing diagrams explain the interaction and sequence of internal and externals signals. functional description 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 g n d v c c f a u l t g n d v l e d 1 - v l e d 1 + v l e d 1 + v l e d 1 - v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s + - 0 . 1 f m i c r o c o n t r o l l e r r f c f r l e d + - 1 f 1 f c b l a n k d d e s a t 1 0 0 r g + - + - q 1 q 2 + h v d c 3 - p h a s e a c - h v d c d e l a y 2 v d e s a t v e v d d v o v s s v c l a m p 1 4 1 6 1 3 1 1 9 1 0 2 5 0 a v d e s a t u v l o c o m p a r a t o r v u v l o 2 5 x 1 x 5 0 x + - + - + - v l e d 2 + 1 5 v l e d 1 + v l e d 1 - v c c g n d f a u l t 6 , 7 5 , 8 2 3 1 , 4
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 26 normal operation fault condition reset i f v desat blanking time 6.5v v o fault fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp 1. led input and operation explanation fod8334 is an advanced igbt gate - drive optocoupler capable of driving most 1200 v / 150 a igbts and power mosfets in motor control and inverter applications. the following section describes driving igbt, but is also applicab le to driving mosfet. adjust the v dd supply based on the gate threshold voltages. critical protection features and controls are incorporated to simplify the design and improve reliability. the device includes an igbt desaturation detection protection and a fault status output. this highly integrated device consists of two high - performance algaas leds and two integrated circuits. led1 directly controls the isolated gate driver ic output, while the returned optical signal path is transmitted by led2, which reports the fault status through the open - collector fault - sense ic output. the control led input and the fault - sense ic output can be connected to a standard 3.3 v / 5 v dsp or microcontroller. the gate driver output can be connected to the gate of the p ower devices on the high - voltage side. a typical recommen ded application is shown in figure 54. a typical shunt led drive can be used to improve noise immunity. the led is connected in parallel with the bipolar transistor switch, creating a current shunt drive. common - mode transients from the load coupling via the package capacitance can be coupled into a low - impedance path, either the conducting led or the on resistance of the conducting bipolar transistor, increasing its noise immunity. during normal operation, when no fault is detected, led1 c ontrols the gate driver output. v o is set to high when the current flowing from the anode to the cathode (led1) is greater than i flh and the forward voltage v f is greater than v f (min). the timing relationship between the led input and gate driver output is illustrated in figure 3. when a fault is detected, the gate driver ouptut ic immediately enters soft turn 2. gate driver output a pair of pmos and nmos make up the output driver stage, which facilitates close to rail - to - rail output swing. this feature allows tight control of gate voltage during on - state and short - circuit conditions. the output driver can typically sink 3 a and source 3 a at room temperature. due to the low r ds(on) of the mosfets, the power dissipation is lower than bipolar - type driver output stages. the absolute maximum rating of the output peak current, i o(peak) , is 4 a. careful selection of the gate resis tor, r g , is required to avoid violation of this rating. for charging and discharging, the r g value is approximated by: r g = v cc C ee C ol / iol(peak). (1) figure 56. operating relationsip among desaturation voltage (desat), f ault output (fault), and reset conditions
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 27 fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp as shown in figure 55, the gate driver output is influenced by signals from the photodetector circuitry, the uvlo comparator, and the desat signals. under no - fault condition, normal operation resumes while the supply voltage is above the uvlo threshold and the output of the photodetector drives the mosfets of the output stage. the logic circuitry of the output stage ensures that the push - pull devices are never turned on simultaneously. when the output of the photodetector is high, output v o is pulled to high state by turning on the pmos. when the output of the photodetector is low, v o is pulled to low state by turning on the 50xnmos. when v dd supply goes below v uvlo , which is the designated ulvo threshold at the comparator, v o is pulled to low state regardless of photodetector output. when v o is high and desaturation is detected, v o turns off slowly as it is pulled low by the 1xnmos device. the input to the fault - sense circuitry is latched to high state and turns on the led2. the fault - sense signal remains in high state until led1 is switched from low to high. when v o goes below 2 v, the 50xnmos device turns on, clamping the igbt gate firmly to v ss . 3. desaturation protection, fault output and fault reset desaturation detection protects the igbt in short circuit by monitoring the collector - emitter voltage of the igbt when its turned on. when the desat pin es a soft igbt turn reset(fault) (see figure 56). during off state of the igbt, or if v o is low, th e fault sense circuitry is disabled to prevent false fault signals. the desat comparator should be disabled for a short tme period (blanking time) before the igbt turns on to allow the collector voltage to fall below the desat threshold. this blanking per iod protects against false triggering of the desat while the igbt is turning on. the blanking time is controlled by the internal desat charge current, the desat voltage threshold, and the external desat capacitor (capacitor between desat and v e pin). the nominal blanking time can be calculated using external capacitance (c blank ), fault threshold voltage (v desat ), and desat charge current (i chg ): t blank = c blank x v desat / i chg (2) with a recommended 100 pf desat cap acitor, the nominal blanking time is: 100 pf x 6.5 v / 250 a = 2.6 s 4. soft turn - off the soft turn - off feature ensures the safe shutdown of the igbt under fault condition. the gate - driver voltage v o turns off the igbt in a controlled slow manner. this reduces the voltage spike on the collector of the igbt. without this, the igbt would see a heavy spike on the collector, resulting in a permanent damage to the device when its turned off immediately. the v o is pulled to low slowly in 4 s . 5. under - volt age lockout (uvlo) under - voltage detection prevents the application of insufficient gate voltage to the igbt. this could be dangerous, as it would drive the igbt out of saturation and into the linear operation where losses are very high and the igbt quickl y overheats. this feature ensures proper operation of the igbts. the output voltage, v o , remains low irregardless of the inputs, as long as the supply voltage, v dd C e , is less than v uvlo+ during power up. when the supply voltage falls below v uvlo - , v o goes low, as illustrated in figure 57. 6 . active miller clamp function an active miller clamp feature allows the sinking of the miller current to ground during a high - dv/dt situation. instead of driving the igbt gate to a negative supply voltage to increase the safety margin, the device has a dedicated v clamp pin to control the miller current. during turn - off, the gate voltage of the igbt is monitored and the v clamp output is activated when the gate voltage goes below 2 v (relative to v ss ). the miller clamp nmos transistor is then turned on and provides a low resistive path for the miller current, which helps prevent a self - turn - on due to the parasitic miller capacitor in po wer swi tches. the clamp voltage is v ss +2.5 v, typical for a miller current up to 1100 ma. in this way, the v clamp function does not affect the turn - off characteristic. it helps to clamp the gate to the low level throughout the turn - off time. during turn - on, where the input of the driver is activated, the v clamp function is disabled or opened.
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 28 i flh i f v dd C v e v uvlo+ v uvlo C t gp v o figure 57. time to good power fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp 7 . time to good power during fast power up (e.g. bootstrap power supply), the led is off and the output of the gate driver should be in the low or off state. sometimes, race conditions exist that cause the output to follow v dd until all of the circuits in the output ic stabiliz e. this condition can result in output transitions or transients that are coupled to the driven igbt. these glitches can cause the high - and low - side igbts to conduct shoot - through current that can damage the power semiconductor devices. fairchild has intr oduced a initial turn - on delay, called time to good power. this delay, typically 2.0 s, is dd power is applied. 8. dual supply operation C negative bias at v ss the igbts off e (pin 16) and v ss (pin 9 and pin 12). the primary ground reference is the igbts e (pin 16). the under - voltage lockout threshold and desaturation volt age detection are referenced to the igbts emitter (v e ) ground. the negative voltage supply at v ss appears at the gate drive output, v o , when in low state. when the input drives the output high, the output voltage, v o , has the potential of the v dd and v ss . proper power supply bypass capacitors are added to provide paths for the instantaneous gate charging and discharging currents. the schottky diode is recommended connected between v e and v ss to protect against a reverse voltage greater than 0.5 v. the v cla mp (pin 10) should be connected to v ss when not in use. 9 . desat pin protection during turn off, especially with inductive load, a large instantaneous forward - voltage transient can appear on the freewheeling diode of the igbt. a large negative voltage spike on the desat pin can result and draw substantial current out of the gate driver ic if there is not current - limiting resistor . to limit this current, a 100 ? to 1 k? the igbts saturated collector to emitter voltage rr at 35 ns. if two diodes or more are used, the required maximum reverse voltage can be reduced by half or accordingly. this modifies the trigger level for a fault condition. the sum of the desat diode forward - voltage and the igbt collector - emi tter v ce voltage form the voltage at the desat pin. the trigger level for a fault condition given by: v ce@fault = v desat C f (3) where n is the number of the desat diodes. 10 . pull - up resistor on fault pin the faul t pin is an open - collector output and can be connected as wire - or operation with other types of protection (e.g., over - temperature, over - voltage, over - current) to alert the microcontroller. being an open - collector output, it requires a pull - up resistor t o provide a normal high output voltage level. this resistor value must be properly considered based on various ic interface requirements. the sinking current capability is given by i faultl .
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 29 . fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp 11 . increasing the output drive current using an external booster stage if larger gate drive capability is needed for large igbt modules or parallel operation, an output booster stage may be added to driver for optimum performance. a possible implementation is by a discrete npn/pnp totem - pole configuration. these booster transistors should be fast switching and have sufficient current gain to deliver the desired peak output current . figure 58. output b ooster stage for increased output drive current + - 1 f 1 f c b l a n k d d e s a t 1 0 0 r g + - 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 v e f o d 8 3 3 4 v l e d 2 + d e s a t v d d v s s v o v c l a m p v s s
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 30 ordering information part number package packing method fod8334 so 16 - pin tube (50 units per tube) fod8334r2 so 16 - pin tape and reel (750 units per reel) fod8334v so 16 - pin, din en/iec 60747 - 5 - 5 option tube (50 units per tube) FOD8334R2V so 16 - pin, din en/iec 60747 - 5 - 5 option tape and reel (750 units per reel) all packages are lead free per jedec: j - std - 020b standard. marking information 1 2 3 8334 v d x y y k k j 8 4 5 6 7 definitions 1 fairchild logo 2 device number, e.g., 8334 for fod8334 3 din en/iec60747 - 5 - 5 option (only appears on component ordered with this option) (pending approvals) 4 plant code, e.g., d 5 alphabetical year code, e.g., e for 2014 6 two - digit work week ranging from 01 to 53 7 lot traceability code 8 package assembly code, e.g., j fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
?201 7 fairchild semiconductor corporation fod8334 rev. 1.0 www.fairchildsemi.com 31 reflow profile 260 t p 240 220 t l 200 180 160 140 120 100 80 60 40 20 0 max. ramp - up rate = 3 c/s max. ramp - down rate = 6 c/s t p t smax preheat area t l t smin t s 120 time 25 c to peak 240 360 time (seconds) figure 59. relow profile profile freature pb - free assembly profile temperature minimum (t smin ) 150c temperature maximum (t smax ) 200c time (t s ) from (t smin to t smax ) 60 C 120 seconds ramp - up rate (t l to t p ) 3c/second maximum liquidous temperature (t l ) 217c time (t l ) maintained above (t l ) 60 C 150 seconds peak body package temperature 260c +0c / C 5c time (t p ) within 5c of 260c 30 seconds ramp - down rate (t p to t l ) 6c/second maximum time 25c to peak temperature 8 minutes maximum t emperature (c) fod8334 input led driv e , 4 a peak output current, igbt drive optocoupler with desaturation detection, isolated f ault sensing, and active miller clamp
0.25 10.30 3.75 10.30 0.33 c 0.20 c a - b 1.27 7.50 0.10 c 0.31 1.27 typ 2x 0.64 typ a d 16 9 16 9 (2.16) 1 8 2x 8 tips 1 8 land pattern recommendation b 3.0 max 0.51 ( 16x) 0 . 2 5 c a - b d a 0.10 c 2.350.10 16x 0.30 0.15 seating plane c gauge plane (1.42) 8 0 (r0.17) (r0.17) 0.25 0.19 notes: unless otherwise specified a) drawing refers to jedec ms - 013, variation aa. b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash and tie bar protrusions d) drawing conforms to asme y14.5m - 1994 e) land pattern standard: soic127p1030x275 - 16n c 1.27 0.40 f) drawing file name: mkt - m16frev2 seating plane scale: 3:1 7 . 3 1 9 . 4 7 1 1 . 6 3 0.10 c d 2x pin one indicator 0.51 typ
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www. onsemi.com 1 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 www.onsemi.com literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative ? semiconductor components industries, llc

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